收藏本站
ADuC7060
Table 82. PWMCON MMR Bit Designations
Bit
14
13
12
11
10
9
8:6
5
4
3
2
1
0
Name
Sync
PWM5INV
PWM3NV
PWM1INV
PWMTRIP
ENA
PWMCP[2:0]
POINV
HOFF
LCOMP
DIR
HMODE
PWMEN
Description
Enables PWM synchronization.
Set to 1 by user so that all PWM counters are reset on the next clock edge after the detection of a high-to-low
transition on the P1.2/SYNC pin.
Cleared by user to ignore transitions on the P1.2/SYNC pin.
Set to 1 by user to invert PWM5.
Cleared by user to use PWM5 in normal mode.
Set to 1 by user to invert PWM3.
Cleared by user to use PWM3 in normal mode.
Set to 1 by user to invert PWM1.
Cleared by user to use PWM1 in normal mode.
Set to 1 by user to enable PWM trip interrupt. When the PWMTRIP input is low, the PWMEN bit is cleared and an
interrupt is generated.
Cleared by user to disable the PWMTRIP interrupt.
If HOFF = 0 and HMODE = 1. Note that, if not in H-bridge mode, this bit has no effect.
Set to 1 by user to enable PWM outputs.
Cleared by user to disable PWM outputs.
If HOFF = 1 and HMODE = 1, see Table 83.
PWM clock prescaler bits. Sets the UCLK divider.
[000] = UCLK/2.
[001] = UCLK/4.
[010] = UCLK/8.
[011] = UCLK/16.
[100] = UCLK/32.
[101] = UCLK/64.
[110] = UCLK/128.
[111] = UCLK/256.
Set to 1 by user to invert all PWM outputs.
Cleared by user to use PWM outputs as normal.
High side off.
Set to 1 by user to force PWM0 and PWM2 outputs high. This also forces PWM1 and PWM3 low.
Cleared by user to use the PWM outputs as normal.
Load compare registers.
Set to 1 by user to load the internal compare registers with the values in PWMxCOMx on the next transition of the
PWM timer from 0x00 to 0x01.
Cleared by user to use the values previously stored in the internal compare registers.
Direction control.
Set to 1 by user to enable PWM0 and PWM1 as the output signals while PWM2 and PWM3 are held low.
Cleared by user to enable PWM2 and PWM3 as the output signals while PWM0 and PWM1 are held low.
Enables H-bridge mode. 1
Set to 1 by user to enable H-bridge mode and Bit 1 to Bit 5 of PWMCON.
Cleared by user to operate the PWMs in standard mode.
Set to 1 by user to enable all PWM outputs.
Cleared by user to disable all PWM outputs.
1
In H-bridge mode, HMODE = 1. See Table 83 to determine the PWM outputs.
Rev. 0 | Page 71 of 100
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
EVAL-ADUC845QSPZ KIT DEV QUICK START ADUC845
EVAL-ADUM3070EBZ BOARD EVAL FOR ADUM3070
EVAL-SDP-CB1Z BOARD EVALUATION FOR SDP-CB1
EVB51JM128 BOARD EVAL FOR MCF51JM128 MCU
EVBQE128 BOARD EVAL FLEXIS QE128 FAMILY
F2068 PNL FIBERGLASS 18.44X14.44" WHT
FAN3100CMPX IC GATE DRVR SGL CMOS 2A 6MLP
FAN3111CSX IC GATE DVR 1CH 1A LOW SOT23-5
相关代理商/技术参数
EVAL-ADUC7060QSPZU1 制造商:Analog Devices 功能描述:
EVALADUC7060QSPZU2 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits)
EVAL-ADUC7061MKZ 功能描述:开发板和工具包 - ARM Quick Start Development System RoHS:否 制造商:Arduino 产品:Development Boards 工具用于评估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口类型:DAC, ICSP, JTAG, UART, USB 工作电源电压:3.3 V
EVAL-ADUC7061MKZ 制造商:Analog Devices 功能描述:ADUC7061MKZ EvaluationBoard
EVAL-ADUC7061MKZU2 制造商:Analog Devices 功能描述:PN may be NE CE 制造商:Analog Devices 功能描述:EVALUATION CONTROL BOARD - Boxed Product (Development Kits)
EVAL-ADUC7121QSPZ 功能描述:BOARD EVALUATION FOR ADUC7121 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:MicroConverter® ADuC7xxx 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF)
EVALADUC7121QSPZU1 制造商:Analog Devices 功能描述:QUICK START DEVELOPMENT SYSTEM - Boxed Product (Development Kits)
EVAL-ADUC7122QSPZ 功能描述:BOARD EVALUATION FOR ADUC7122 RoHS:是 类别:编程器，开发系统 >> 通用嵌入式开发板和套件（MCU、DSP、FPGA、CPLD等） 系列:MicroConverter® ADuC7xxx 标准包装:1 系列:PICDEM™ 类型:MCU 适用于相关产品:PIC10F206，PIC16F690，PIC16F819 所含物品:板，线缆，元件，CD，PICkit 编程器 产品目录页面:659 (CN2011-ZH PDF)